Sharif

Sharif University of Technology

Department of Computer Science and Engineering

EtaDac Lab

Emerging Technologies and Architectures for Data Communication Lab

OPL

Optical Processing Lab

Director

Dr. Somayyeh Koohi

PhD Students

Elham Khani (Co-Superviser)

Saeedeh Akbari

Hoda Sadeghzadeh

Mahmood Kalemati

Masoumeh Mehdinia

MSc Students

Reza kalhor

Azhar Abbas

Maryam Gheysari

Aida Ebrahimi

Azam Abdosalehi

Farzin Mohammadi

AmirHossein Mohammadi

Fatemeh Tabatabaee

Mojtaba Zamani

Pouria Laghaee

Reyhaneh Ahmadi

Saeed Darvishi

Graduated PhD Students

Melika Tinati (Advisor)

Graduated MSc Students

Roshanak Karimi

Negar Rezaei

Hossein Babashah

Ehsan Melaki

Ali Nezhadi

Ali-Reza Abolhasani

Alborz Derakhshan-far

Hamid-Reza Erfani

Saeedeh Akbari

Mahdieh Movahederad

Research Projects

The growing technologies have increased the demand of high performance computing. According to G. Moore’s low, number of transistor counts to be integrated per unit area in devices will almost double in one and half year. To achieve high speed computation, high packaging density in the logic circuits is required which results in more heat dissipation. The conventional computing is found unable to deal with low power, high compaction and heat dissipation issues of the current computing environment.

 

Optical Computing is computation with photon as opposed to conventional electron based computation. Unmatched high speed and zero mass of photon have attracted the researchers towards the optical realization of reversible logic gates using Semiconductor Optical Amplifier (SOA) based Mach Zehnder Interferometer (MZI) switches.  In order to build the optical computer, all-optical flexible signal processing devices are needed. Optical logic gates are considered as key elements in real time optical processing and communication systems which perform the necessary functions at the nodes of network such as data encoding and decoding, pattern matching, recognition and various switching operations.

 

The increasing interconnection bandwidth demands for chip multiprocessors (CMP) cannot be simply satisfied by the reduction of the transistor feature sizes and raising of the chip operation frequency. This problem stems from many limitations associated with electrical interconnects, such as latency, impedance, bandwidth, and power consumption.

Optics provides low power dissipation that remains independent of capacity and distance, as well as wavelength parallelism, ultra-high throughput, and minimal access latencies. Importance of power dissipation in on-chip communication architectures, along with power reduction capability of on-chip optical interconnects, offers Optical Network-on-Chip (ONoC) as a new technology solution which can introduce on-chip interconnection architecture with high transmission capacity, low power consumption, and low latency. The aim of this project is to investigate innovative interconnect technologies such as photonic waveguide based and 3D hybrid on-chip communication architectures.

Many of the modern Systems-on-Chip integrate a high density of heterogeneous components such as different processors, a wide range of hardware components, as well as complex interconnects that use different communication protocols. On-chip physical interconnections represent a limiting factor for the performance and energy consumption. Currently, the optical interconnects integrated on chip are a viable alternative for on chip interconnects. However, the access to physical prototyping of these interconnects is a major challenge because this systems require very recent technologies, still difficult to access. Thus, their high-level modeling and validation are mandatory. The aim of this project is to propose a modeling approach of the passive integrated photonic routing structures considering physical-level delay and power issues.

Last Updated : January  2019