Publications(in reverse chronological order)

 
 

 Refereed Journal Papers:   


  1. 1. Hadi Mardani Kamali, Kimia Zamiri Azar, Shaahin Hessabi, “DuCNoC: A High-Throughput FPGA-based NoC simulator using Dual-Clock Lightweight Router Micro-Architecture,” IEEE Transactions on Computers, Vol.PP, No.99, pp.1-1, August 2017.

  2. 2. Melika Tinati, Roshanak Karimi, Somayyeh Koohi, Shaahin Hessabi, “Topology exploration of a thermally resilient wavelength-based ONoC,” Journal of Parallel and Distributed Computing, May. 2017.

  3. 3. Amin Mosayyebzadeh, Maziar Mehdizadeh Amiraski, Shaahin Hessabi, “Thermal and power aware task mapping on 3D Network on Chip,” Computers & Electrical Engineering, 51, pp. 157–167, April 2016.

  4. 4. Hadi Mardani Kamali, Shaahin Hessabi, “A Fault Tolerant Parallelism Approach for Implementing High-Throughput Pipelined Advanced Encryption Standard,” Journal of Circuits, Systems, and Computers 25(9): pp. 1-14, 2016.

  5. 5. Somayeh Maabi, Sina Sayyah Ensan, Mohammad Hossein Moaiyeri, Shaahin Hessabi, “A Low-Power Hierarchical FINFET-Based SRAM,” CSI Journal on Computer Science and Engineering, Vol. 13, no. 2, pp. 54-60, 2016.

  6. 6. Hajar Falahati, Somayyeh Koohi, Shaahin Hessabi, “Application-based dynamic reconfiguration in optical network-on-chip,” Computers & Electrical Engineering 45: 417-429 (2015).

  7. 7. Mahdi Zare, Shaahin Hessabi, Maziar Goudarzi, “Heuristic algorithm for periodic clock optimisation in scheduling-based latency-insensitive design,” IET Computers & Digital Techniques 9(3): 165-174 (2015).

  8. 8. M. M. Keshtegar, Hajar Falahati, Shaahin Hessabi, “Cluster-based approach for improving graphics processing unit performance by inter streaming multiprocessors locality,” IET Computers & Digital Techniques 9(5): 275-282 (2015).

  9. 9. Nima Jafarzadeh, Maurizio Palesi, Saeedeh Eskandari, Shaahin Hessabi, Ali Afzali-Kusha, “Low Energy yet Reliable Data Communication Scheme for Network-on-Chip,” IEEE Trans. on CAD of Integrated Circuits and Systems 34(12): 1892-1904 (2015).

  10. 10. Hajar Falahati, Shaahin Hessabi, Mania Abdi, Amirali Baniasadi, “Power-efficient prefetching on GPGPUs,” The Journal of Supercomputing 71(8): 2808-2829 (2015).

  11. 11. Somayyeh Koohi, Shaahin Hessabi, “All-Optical Wavelength-Routed Architecture for a Power-Efficient Network on Chip,” IEEE Trans. Computers 63(3): 777-792 (2014).

  12. 12. Somayyeh Koohi, Yawei Yin, Shaahin Hessabi, S. J. Ben Yoo, “Towards a scalable, low-power all-optical architecture for networks-on-chip,” ACM Trans. Embedded Comput. Syst. 13(3s): 101:1-101:30 (2014).

  13. 13. Mahdi Zare, Shaahin Hessabi, Maziar Goudarzi, “An Efficient Synchronization Circuit in Multi-Rate SDH Networks,” Arabian Journal for Science & Engineering (Springer Science & Business Media BV), Vol. 39, Issue 4, Apr. 2014.

  14. 14. Sanaz Alamian, Ramin Fallahzadeh and Shaahin Hessabi, “RSFR: A Recursive Self-Testable and Fault-Tolerant Routing Protocol for NoC Routers,” CSI Journal on Computer Science and Engineering (JCSE), (12): 1-10, 2014.

  15. 15. Neda Hassanpour, Shaahin Hessabi, Parisa Khadem Hamedani, “Temperature control in three-network on chips using task migration,” IET Computers & Digital Techniques 7(6): 274-281 (2013).

  16. 16. Parisa Khadem Hamedani Natalie Enright Jerger, Shaahin Hessabi, Hamid Sarbazi-Azad, “Throughput enhancement for repetitive internal cores in latency-insensitive systems,” International Journal of Adaptive, Resilient and Autonomic Systems (IJARAS), Vol. 4, no. 3, 42-60, Jan 2013.

  17. 17. Dara Rahmati, Hamid Sarbazi-Azad, Shaahin Hessabi, Abbas Eslami Kiasari, “Power-efficient deterministic and adaptive routing in torus networks-on-chip,” Microprocessors and microsystems, Vol. 36, no. 7, pp. 571-585, Oct. 2012.

  18. 18. Mahdi Zare, Shaahin Hessabi, Maziar Goudarzi, “Throughput enhancement for repetitive internal cores in latency-insensitive systems,” IET Computers & Digital Techniques 6(5): 342-352 (2012).

  19. 19. Somayyeh Koohi, Shaahin Hessabi, “All-Optical Wavelength-Routed Architecture for a Power-Efficient Network on Chip,” Accepted for publication in IEEE Transactions on Computers.

  20. 20. Somayyeh Koohi, Shaahin Hessabi, “Scalable architecture for a contention-free optical network on-chip,” Journal of Parallel and Distributed Computing, doi:10.1016/j.jpdc.2012.02.003, February 2012. 

  21. 21. Mehdi Kamal, Somayyeh Koohi, Shaahin Hessabi, “GPH: A group-based partitioning scheme for reducing total power consumption of parallel buses,” Elsevier Journal of Microprocessors and Microsystems, Volume 35, Issue 1, pp. 68-80, February 2011.

  22. 22. Somayyeh Koohi, Shaahin Hessabi, “Hierarchical Opto-Electrical on-Chip Network for Future Multiprocessor Architectures,” Elsevier Journal of Systems Architecture, vol. 57, no. 1, pp 4-23, Jan 2011.    

  23. 23. M. Goudarzi, S. Hessabi, N. MohammadZadeh, N. Zeinolabedini, “The ODYSSEY Approach to Early Simulation-based Equivalence-Checking at ESL Level using Automatically-Generated Executable Transaction-Level Model,” Elsevier Journal of Microprocessors & Microsystems, Vol. 32, Issue 7, pp. 364–374, Oct. 2008.

  24. 24.  N. MohammadZadeh, S. Hessabi, M. Goudarzi, M. Malaki, “A Framework for Object-Oriented Embedded System Development Based on OO-ASIPS,” World Scientific Journal of Circuits, Systems, and Computers, Vol. 17, No. 6, pp. 973-993, December 2008.

  25. 25.  M. Goudarzi, N. MohammadZadeh, S. Hessabi, “Using On-Chip Networks to Implement Polymorphism in the Co-design of Object-Oriented Embedded Systems,” Elsevier Journal of Computer and System Sciences (JCSS), Special Issue on Network-Based Computing, pp. 1221-1231, vol. 73, issue 8, 2007.

  26. 26.  A.M. Gharehbaghi, S. Hessabi, B. Hamdin Yaran, M. Goudarzi, “An Assertion-Based Verification Methodology for System-Level Design,” Elsevier Journal of Computers and Electrical Engineering, pp. 269-284, vol. 33, issue 4, 2007.

  27. 27.  Alireza Poshtkohi, Ali Haj Abutalebi and Shaahin Hessabi, “DotGrid: a .NET-based cross-platform software for desktop grids,” Int. J. Web and Grid Services, Vol. 3, No. 3, pp. 313-332, 2007.

  28. 28.  Shahin Hessabi, Sina Meraji, Nima Shahbazi, Hadi Sadeghi, "Memory Access Time Speed Up in an OO-ASIP Using Cache Interleaving," (in Persian), CSI Journal on Computer Science and Engineering, Vol. 4, No. 3(a), pp.37-44, 2006.

  29. 29.  N. Babaii-Rizvandi, A. Nabavi-Lishi, and S. Hessabi, "An accurate FIR approximation of Ideal Fractional Delay Filter with Complex Coefficients in Hilbert Space," Journal of Circuits, Systems, and Computers (JCSC),  Vol. 14, No. 3, pp. 497-505, June 2005. 

  30. 30.  K. Khamei, A. Nabavi, S. Hessabi, and S. M. Barandagh,  "Design of Variable Fractional Delay FIR Filters With CSD Coefficients Using Genetic Algorithm," Journal of Circuits, Systems, and Computers (JCSC), Vol. 14, No. 6,  pp.1145-1155, Dec. 2005. 

  31. 31.  Goudarzi, M, Hessabi, S, and Mycroft, A, "Object-Oriented Embedded System Development Based on Synthesis and Reuse of OO-ASIPs," Journal of Universal Computer Science, Vol 10, N0. 9, pp. 1123-1156, September 2004.

  32. 32.  S. Hessabi, M. Y. Osman, and M. I. Elmasry, “Differential BiCMOS Logic Circuits: Fault Characterization and Design-for-Testability," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 3, No. 3, pp. 437 - 445, September 1995.

 

Conference Papers:   

    2017 Publications:

  1. 1. Hossein Farrokhbakht, Hadi Mardani Kamali, Shaahin Hessabi, “SMART: A Scalable Mapping And Routing Technique for Power-Gating in NoC Routers,” Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-Chip, October 2017.

  2. Before 2017:

  3. 1. Hossein Farrokhbakht, Mohammadkazem Taram, Behnam Khaleghi, Shaahin Hessabi, “TooT: An Efficient and Scalable Power-Gating Method for NoC Routers,” International Symposium on Networks-on-Chip (NOCS), 2016.

  4. 2. Melika Tinati, Somayyeh Koohi, Shaahin Hessabi, “Impact of on-chip power distribution on Temperature-Induced Faults in Optical NoCs,” IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC), Sep. 2016.

  5. 3. Hadi Mardani Kamali, Shahin Hessabi, “AdapNoC: A fast and flexible FPGA-based NoC simulator,” 26th International Conference on Field Programmable Logic and Applications (FPL), Aug. 2016.

  6. 4. Parisa Khadem Hamedani, Natalie Enright Jerger, Shaahin Hessabi, “Qut: A low-power optical network-on-chip,” Eighth IEEE/ACM International Symposium on Networks-on-Chip (NoCS), Sep. 2014.

  7. 5. Hajar Falahati, Mania Abdi, Amirali Baniasadi, Shaahin Hessabi, “ISP: using idle SMs in hardware-based prefetching,” CSI International Symposium on Computer Architecture and Digital Systems (CADS), Oct. 2013.

  8. 6. Sanaz Sadat Alamian, Ramin Fallahzadeh, Shaahin Hessabi, Javad Alirezaie, “A novel test strategy and fault-tolerant routing algorithm for NoC routers,” CSI International Symposium on Computer Architecture and Digital Systems (CADS), Oct. 2013.

  9. 7. Neda Hassanpour, P Khadem, S Hessabi, “A task migration technique for temperature control in 3D NoCs,” IEEE International Conference on Advanced Information Networking and Applications (AINA), 2013.

  10. 8. Meisam Abdollahi, Mohammad Khavari Tavana, Somayyeh Koohi, Shaahin Hessabi, “ONC3: All-optical NoC based on cube-connected cycles with quasi-DOR algorithm,” 15th Euromicro Conference on Digital System Design (DSD), Sep. 2012.

  11. 9. Hoda Aghaei Khouzani, Somayyeh Koohi, Shaahin Hessabi, “Fully contention-free optical NoC based on wavelenght routing,” CSI International Symposium on Computer Architecture and Digital Systems (CADS), May. 2012.

  12. 10. Somayyeh Koohi, Yawei Yin, Shaahin Hessabi, Sj Ben Yoo, “Energy efficient all-optical arbitration in optical network-on-chip,” Optical Fiber Communication Conference, Mar. 2012.

  13. 11. Parisa Khadem Hamedani, Shaahin Hessabi, Hamid Sarbazi-Azad, Natalie Enright Jerger, “Exploration of temperature constraints for thermal aware mapping of 3d networks on chip,” 20th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP), Feb. 2012.

  14. 12. Mahdi Zare, Shaahin Hessabi, Maziar Goudarzi, “Efficient periodic clock calculus in latency-insensitive design,” 18th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Dec. 2011.

  15. 13. Sayyed Hasan Mozafari, Mahdi Fazeli, Shaahin Hessabi, Seyed Ghassem Miremadi, “A low cost circuit level fault detection technique to full adder design,” 18th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Dec. 2011.

  16. 14. Somayyeh Koohi, Shaahin Hessabi, “Power Efficient Nanophotonic on-Chip Network for Future  Large Scale Multiprocessor Architectures,” in ACM/IEEE International Symposium on Nanoscale Architecture (NanoArch), June 2011.

  17. 15. Ramin Rajaei, Shaahin Hessabi, Bijan Vosoughi Vahdat, “An energy-aware methodology for mapping and scheduling of concurrent applications in MPSoC architectures,” 19th Iranian Conference on Electrical Engineering (ICEE), May 2011.

  18. 16. Somayyeh Koohi, Maysam Abdollahi, Shaahin Hessabi, “All-optical wavelength-routed NoC based on a novel hierarchical topology,” ACM/IEEE International Symposium on Networks-on-Chip (NOCS), pp.97-104, May 2011.

  19. 17. Somayyeh Koohi, Alireza Shafaei, Shaahin Hessabi, “An Optical Wavelength Switching Architecture for a High-Performance Low-Power Photonic NoC,” International Symposium on Frontiers of Information Systems and Network Applications (FINA), March 2011.

  20. 18. Somayyeh Koohi, Alireza Shafaei, Shaahin Hessabi, “Scalable Architecture for Wavelength-Switched Optical NoC with Multicasting Capability,” in Euromicro Conference on Digital System Design Architectures, Methods, and Tools (DSD), pp. 398-403, Sep. 2010.

  21. 19. Somayyeh Koohi, Shaahin Hessabi, “Hierarchical on-Chip Routing of Optical Packets in Large Scale MPSoCs,” Proceedings of the 18th Euromicro Conference on Parallel, Distributed and Network-based Processing (PDP 2010), Pisa, Italy, pp. 515-524, February 17-19, 2010.

  22. 20. Meysam Taassori, Shaahin Hessabi, “Low Power Encoding in NoCs Based on Coupling Transition Avoidance,” 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, DSD 2009, Patras, Greece, 27-29 August 2009.

  23. 21. D. Rahmati, A. E. Kiasari, H. Sarbazi-Azad, and S. Hessabi, “Power-Efficient Routing Algorithm for Torus NoCs,” International Conference on Contemporary Computing, New Delhi, India, pp. 211-220, August 2009.

  24. 22. Somayyeh Koohi, Shaahin Hessabi, “Contention-free on-chip routing of optical packets,” Proceedings of the 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip (NOCS), La Jolla, CA, USA, pp. 134-143,  May 10-13, 2009.

  25. 23. H. Kooti, M. Mirza-Aghatabar, S. Hessabi, A. Tavakkol, “Energy Analysis of Re-Injection     Based Deadlock Recovery Routing Algorithms,” in Proceedings of 10th IEEE International Symposium on System-on-Chip (SoC), Tampere, Finland, November 4-6, 2008.

  26. 24. Abbas Eslami Kiasari, Hamid Sarbazi-Azad, and Shaahin Hessabi, “Caspian: A Tunable Performance Model for Multi-core Systems,” Euro-Par 2008, Spain, LNCS 5168, pp. 100–109, August 2008.

  27. 25. A. E. Kiasari, S. Hessabi and H. Sarbazi-Azad, “PERMAP: A Performance-Aware Mapping for Application-Specific SoCs,” International Conference on Application-Specific Systems, Architectures and Processors (ASAP 2008), Montreal, Canada, pp. 73-78, July 2008.

  28. 26. Nima Karimpour Darav and Shaahin Hessabi, “Polymorphism-Aware Common Bus in an Object-Oriented ASIP,” Proceedings of the 13th. International CSI Computer Conference (CSICC 2008), CCIS 6, pp. 115–122, 2008.

  29. 27. Hassan Hatefi-Ardakani, Amir Masoud Gharehbaghi, and Shaahin Hessabi, “System-Level Assertion-Based Performance Verification for Embedded Systems,” Proceedings of the 13th. International CSI Computer Conference (CSICC 2008), CCIS 6, pp. 243–250, 2008.

  30. 28. Shoaleh Hashemi Namin and Shaahin Hessabi, “Integration of System-Level IP Cores in Object-Oriented Design Methodologies,” Proceedings of the 13th. International CSI Computer Conference (CSICC 2008), CCIS 6, pp. 106–114, 2008.

  31. 29. Mehdi Kamal, Somayyeh Koohi and Shaahin Hessabi, “A Novel Partitioned Encoding Scheme for Reducing Total Power Consumption of Parallel Bus,” Proceedings of the 13th. International CSI Computer Conference (CSICC 2008), CCIS 6, pp. 90-97, 2008.

  32. 30. Mohammad Mirza-Aghatabar, Somayyeh Koohi, Shaahin Hessabi, Dara Rahmati, “An Adaptive Approach to Manage the Number of Virtual Channels,” 22nd International Conference on Advanced Information Networking and Applications (AINA 2008), pp. 353-358, Japan, March 25-28, 2008.

  33. 31. Abbas Eslami Kiasari, Dara Rahmati, Hamid Sarbazi-Azad, Shaahin Hessabi, “A Markovian Performance Model for Networks-on-Chip,” 16th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP 2008), pp. 157-164, Toulouse, France, 13-15 February 2008.

  34. 32. Somayyeh Koohi, Mohammad Mirza-Aghatabar, Shaahin Hessabi, Massoud Pedram, “High-Level Modeling Approach for Analyzing the Effects of Traffic Models on Power and Throughput in Mesh-Based NoCs,” 21st International Conference on VLSI Design (VLSI Design 2008), pp. 415-420, 4-8 January 2008, Hyderabad, India.

  35. 33.  B. Ghavami, M. Mirza-Aghatabar, H. Pedram, S. Hessabi, “Analysis and Fast Estimation of Energy consumption in template based QDI Asynchronous Circuits,” IEEE International Symposium on Integrated Circuits (ISIC 2007), pp. 445-448, Singapore, 26-28 Sept. 2007.

  36. 34. S.Koohi, M. Mirza-Aghatabar, S. Hessabi, “Evaluation of Traffic Pattern Effect on Power Consumption in Mesh and Torus Network-on-Chips,” IEEE International Symposium on Integrated Circuits (ISIC 2007), pp. 512-515, Singapore, 26-28 Sept. 2007.

  37. 35. M. Mirza-Aghatabar, A. Rasooli, B. Ghavami, Sh. Hessabi, “A new Approach to support Fault Simulation of Delay Insensitive Asynchronous Circuits with Synchronous Toolset,” in Proceedings of the 5th IEEE East-West Design & Test Symposium (EWDTS’07), pp. 243-248, 7-10 Sept. 2007. (Best Paper Diploma)

  38. 36. Mehdi Kamal, Shaahin Hessabi, “Low Power Techniques for System-Level Object Oriented Synthesis,” 5th IEEE East-West Design & Test Symposium (EWDTS'07), Yerevan, September 7-10, 2007.

  39. 37. Mehdi Kamal, Somayyeh Koohi, Shaahin Hessabi, “Empirical Analysis of the Dependence of Test Power, Delay, Energy and Fault Coverage on the Architecture of LFSR-Based TPGs,” 22nd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT 2007), pp. 179-187, 2007.

  40. 38. Mehdi Kamal, Shaahin Hessabi, “Low Power Object Oriented Synthesis for Electronic System-Level Design,” 14th Workshop on Synthesis and System Integration of Mixed Information technologies (SASIMI2007), pp. 439 – 444, Japan, Oct. 2007.

  41. 39. M. Mirza-Aghatabar, S.Koohi, S. Hessabi, M. Pedram, “An Empirical Investigation of Mesh and Torus NoC Topologies Under Different Routing Algorithms and Traffic Models,” 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2007), pp. 19-26, Germany, August 27th - 31st, 2007.

  42. 40. Amir Masoud Gharehbaghi, Mozhgan Babagoli, Shaahin Hessabi, “Assertion-Based Debug Infrastructure for SoC Designs,” the 19th International Conference on Microelectronics (ICM 2007), Egypt, December 2007.

  43. 41. Hassan Hatefi Ardakani, Amir Masoud Gharehbaghi, Shaahin Hessabi, “A Performance and Functional Assertion-Based Verification Methodology at Transaction-Level,” the 19th International Conference on Microelectronics (ICM 2007), Egypt, December 2007.

  44. 42. Elham K. Moghaddam and Shaahin Hessabi, “An On-Line BIST Technique for Delay Fault Detection in CMOS Circuits,” 16th IEEE Asian Test Symposium, pp. 73-76, October 2007, Beijing, China.

  45. 43. Elham K. Moghaddam, Shaahin Hessabi, “An On-Line BIST Technique for Stuck-Open Fault Detection in CMOS Circuits,” 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2007), pp. 619-625, Germany, August 27th - 31st, 2007.

  46. 44. Naser MohammadZadeh, Morteza NajafVand, Shaahin Hessabi and Maziar Goudarzi, "Implementation of a JPEG Object-Oriented ASIP: A Case Study on a System-Level Design Methodology," Great Lakes Symposium on VLSI (GLSVLSI'07), Stresa-Lago Maggiore, Italy, March 2007.

  47. 45. S. HashemiNamin, S. Hessabi, "An IP Integration Methodology in an Object-Oriented Design Environment for Embedded Systems," [in Persian] Proceedings of the 12th. International CSI Computer Conference (CSICC'07), pp. 982-987, Tehran, Iran, Feb. 2007.

  48. 46. Hassan Hatefi Ardakani, Amir Masoud Gharehbaghi, and Shaahin Hessabi, "A System-Level Verification Methodology Using Performance and Functional Assertions," Proceedings of the 12th. International CSI Computer Conference (CSICC'07), pp. 1704-1709, Tehran, Iran, Feb. 2007.

  49. 47. Amir Masoud Gharehbaghi, Shaahin Hessabi, “Transaction-Level Assertion Language for Functional and Performance Verification,” DATE 2007

  50. 48. Mehdi Kamal, Mehdi Salmani Jelodar, Shaahin Hessabi, “GABIST: A New Methodology to Find near Optimal LFSR for BIST Structure,” IEEE Computer Society Annual Symposium on VLSI 2007, pp. 1107-1110, Porto Alegre, Brazil, May 2007.

  51. 49. Nasim Zeinolabedini, Shaahin Hessabi, "Development of a Co-Simulation Environment in a System Level Design Methodology," Proceedings of the 12th. International CSI Computer Conference (CSICC'07), pp. 1716-1721, Tehran, Iran, Feb. 2007.

  52. 50. M. Mirzaaghatabar, Sh. Hessabi, H. Pedram, "A Novel Method to support C-element in Conventional EDA Tools," Proceedings of the 12th. International CSI Computer Conference (CSICC'07), pp. 2463-2466, Tehran, Iran, Feb. 2007.

  53. 51. D. Rahmati, A. E. Kiasari, S. Hessabi, and H. Sarbazi-Azad, "A Performance and Power Analysis of WK-Recursive and Mesh Networks for Network-on-Chips," IEEE International Conference on Computer Design (ICCD 2006), San Jose, CA, USA, Oct. 2006.

  54. 52. S. Hessabi, M. Modarressi, M. Goudarzi, H. Javanhemmat, "A Table-Based Application-Specific Prefetch Engine for Object-Oriented Embedded Systems," The 6th International Workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS 2006) Greece, pp. 7-13, July 17 - 20, 2006.

  55. 53. M. Modarressi, S. Hessabi, and M. Goudarzi, "A Reconfigurable Cache Architecture for Object-Oriented Embedded Systems," Proceedings of the 2006 Canadian Conference on Electrical and Computer Engineering, pp. 26-29, Ottawa, Canada, May 2006.

  56. 54. H. Javanhemmat, M. Goudarzi, and S. Hessabi, "On the Hardware-Software Partitioning: the Classic General Model (CGM)," Proceedings of the 2006 Canadian Conference on Electrical and Computer Engineering, pp. 1891-1894, Ottawa, Canada, May 2006.

  57. 55. M. Modarressi, H. Javanhemat, S. G. Miremadi, S. Hessabi, M. Najafvand, M.Gudarzi, and N. Mohamadzadeh, "A Fault-Tolerant Approach to Embedded-System Design Using Software Standby Sparing," 11th. International CSI Computer Conference (CSICC'06), Vol 2, pp. 77-84, Tehran, Iran, Jan. 2006.

  58. 56. R. Iraji, S. Hessabi, and E.K. Moghadam, "Accelerating the Rijndael Algorithm Using Custom Instructions Capability of Nios II in ODYSSEY,” IEEE International Conference on Design & Test of Integrated Systems in Nanoscale Technology (DTIS'06) pp. 69-73, Sept. 2006, Tunis, Tunisia.

  59. 57. Naser Mohammadzadeh, Shaahin Hessabi, and Maziar Goudarzi, "Evolving an MPEG2 Processor from a JPEG Object-Oriented ASIP: A Case Study on a System-Level Design methodology," 11th. International CSI Computer Conference (CSICC'06), Vol 2, pp. 92-97, Tehran, Iran, Jan. 2006.

  60. 58. Alireza Poshtkuhi, Ali Haj Abutalebi, Leila Mahmoudi Ayough and Shaahin Hessabi, "DotGrid: A .NET-based Cross-Platform Grid Computing Infrastructure," 6th IEEE International Symposium on Cluster Computing and the Grid (CCGrid2006), 16-19 May 2006, Singapore.

  61. 59. Y. Sedaghat, S. Hessabi, and S. G. Miremadi, "A Flood-Based Routing Algorithm to Increase the Performance of NoCs," (in Persian), 11th. International CSI Computer Conference (CSICC'06), Vol 1, pp. 995-998, Tehran, Iran, Jan. 2006.

  62. 60. M. Modarressi, H. Javan-Hemmat, S.G. Miremadi, S. Hessabi, M. Najafvand, M. Goudarzi, M. Mohamadzade, "A Fault-Tolerant Approach to Embedded System Design Using Software Standby Sparing," 11th. International CSI Computer Conference (CSICC'06), Vol 1, Tehran, Iran, Jan. 2006.

  63. 61. Shaahin Hessabi, Seyed Sina Meraji, Nima Shahbazi, Hadi Sadeghi, "Memory Access Speed-up in an OO-ASIP Using Cache Splitting," (in Persian), 11th. International CSI Computer Conference (CSICC'06), Vol 1, pp.49-55, Tehran, Iran, Jan. 2006. 

  64. 62. Y. Sedaghat, S. Hessabi, and S. G. Miremadi, Mostafa Shad Zolpirani, "A Method to Improve the Performability of NOC Using Dual Source-Router Conjunction," (in Persian), 11th. International CSI Computer Conference (CSICC'06), Vol 1, pp.115-121, Tehran, Iran, Jan. 2006.

  65. 63. M. Modarressi, S. Hessabi, M. Goudarzi, "A Data Prefetching Mechanism for Object-Oriented Embedded Systems Using Run-Time Profiling," Third IEEE Workshop on Electronic Design, Test, and Applications (DELTA'06), Malaysia, Jan. 17-19, 2006. 

  66. 64. N. MohammadZadeh, S. Hessabi, M. Goudarzi, "Software Implementation of MPEG2 Decoder on an ASIP JPEG Processor," International Conference on Microelectronics (ICM'05), pp. 310-315, Islamabad, Pakistan, 13-15 December 2005.

  67. 65. M. Fazeli, R. Farivar, S. Hessabi, S. G. Miremadi, "A Fault Tolerant Approach to Object Oriented Design and Synthesis of Embedded Systems", The Second Latin-American Symposium on Dependable Computing (LADC 2005), published by Springer-Verlag LNCS Series, Volume 3747 / 2005, P.143, Salvador, Brazil, 25-28 October 2005.

  68. 66. M. Modarressi, M. Goudarzi, S. Hessabi, "Application-Specific Hardware-Driven  Prefetching To Improve Data Cache Performance," Proc. of Tenth Asia-Pacific Computer System Architecture Conference (ACSAC'05), published by Springer-Verlag LNCS Series, pp. 761-774, Singapore, 24-26 October 2005. 

  69. 67. M. Gudarzi, S. Hessabi, "The ODYSSEY Tool-Set for System-Level Synthesis of Object-Oriented Models," The 5th International Workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS 2005), Published by Springer-Verlag LNCS Series, Volume 3553 / 2005, pp. 394-403,  Samos, Greece, July 18-20, 2005. . 

  70. 68. B. Saghaie, S. Hessabi, "On Complexity Analysis of Path Delay Fault Testing at RT Level," IEEE Latin-American Test Workshop (LATW 2005), Salvador (Bahia), Brazil, March 30- April 2, 2005.

  71. 69. N.Babaii Rizvandi, A.Nabavi, Sh.Hessabi, N.Kamyabpour, "An Accurate FIR Approximation of Ideal Fractional Delay in Hilbert Space,” IEEE International Symposium on Signal Processing and Information Technology (ISSPIT 2004), Italy, Dec.18-21, 2004. 

  72. 70. A. M. Gharehbaghi, S. Hessabi, B. Hamdin Yaran, M. Goudarzi, "Integrating Assertion-Based Verification into System-Level Methodology," 16th International Conference on Microelectronics (ICM'04), pp. 232-235, December 2004, Tunisia.

  73. 71. N. Babaii-Rizvandi, A.Nabavi-Lishi, S.Hessabi, and N. Kamyabpour, "An Accurate FIR Approximation of Ideal Fractional Delay with Complex Coefficients in Hilbert Space," 38th Asilomar Conference on Signals, Systems and Computers, Nov. 2004, USA.

  74. 72. H. R. Zarandi, S. G. Miremadi, S. Hessabi and A.R. Ejlali, "A Mixed-Mode Simulation-Based Environment to Test and Dependability Assessment of HDL Models," Proceedings of International Conference on Embedded Systems and Applications (ESA 2004), pp. 582-588, Las Vegas, USA, June 2004.

  75. 73. Maziar Goudarzi, Shaahin Hessabi, and Alan Mycroft, "Object-Aware Cache: Higher Hit-Ratio in Object-Oriented ASIPs," Proceedings of the 2004 Canadian Conference on Electrical and Computer Engineering, pp. 653-656, Niagara Falls, Canada, May 2004. 

  76. 74. Amir Masoud Gharehbaghi, Shaahin Hessabi, Mohammad Reza Eshghi, "High-Level Symbolic Simulation Using Integer Equations," Proceedings of the 2004 Canadian Conference on Electrical and Computer Engineering, pp. 1241-1244, Niagara Falls, Canada, May 2004. 

  77. 75. R. Mohammadkhani, S. Hessabi, "A Combined Method to Improve Sequential Circuit Test Generation," Proc. Of the 9th Annual CSI Computer Conference (CSICC 2004), pp. 91-95, Tehran, Iran, February 2004.

  78. 76. M. Goudarzi, S. Hessabi, A. Mycroft, “Overhead-Free Polymorphism in Network-on-Chip Implementation of Object-Oriented Models,” Proceedings of the Design, Automation and Test in Europe Conference (DATE’04), Volume 2. pp. 21380-21381, February 2004, Paris.

  79. 77. M. Goudarzi, S. Hessabi, “Synthesis of Object-Oriented Descriptions Modeled at Functional-Level,” Proceedings of  the International Conference on Electronics, Control and Signal processing (ICECS’03), December 2003, Singapore.

  80. 78. M. Goudarzi, S. Hessabi, A. Mycroft, “Object-oriented ASIP Design and Synthesis”, Proc. of Forum on specification and Design Languages (FDL’03), September 2003, Frankfurt, Germany.

  81. 79. N. Babaii, A. Nabavi, and S. Hessabi, "Design and Implementation of Digital Decimation Filter for Digital ADSL Modems," Proceedings of the International Symposium on Telecommunications (IST2003), pp. 442-445, 16-28 August, 2003, Isfahan, Iran.

  82. 80. K. Khamei, A. Nabavi, and S. Hessabi, "Design of Variable Fractional Delay FIR Filters Using Genetic Algorithm," 10th IEEE International Conference on Electronics, Circuits and Systems (ICECS 10), 14-17 December 2003, United Arab Emirates.

  83. 81. Mostafa Ghader, Shaahin Hessabi, “Designing a High-Speed 1024-Bit RSA Crypto-Processor with Radix-4 Montgomery multiplication,"  (in Persian), Proceedings of the 2nd Iranian Society of Cryptology Conference on Cryptology, Communications & Computer Security (ISCC’2003) , pp.35-42, Tehran, Iran, Oct. 2003.

  84. 82. N. Nejati, S. Hessabi, "Improving the Performance of the G.729 Error Concealment Algorithm for VoIP Applications," (In Persian) Proc. Of the 8th CSI Computer Conference (CSICC 2003), pp. 1-5, Mashhad, February 2003.

  85. 83. Ali Ahmadinia, Shaahin Hessabi, and Javad Alirezaie, "An SOC-Based Real-Time Spectrograph," Proceedings of the 20th IEEE NORCHIP Conference, Copenhagen, Denmark, November 2002. 

  86. 84. Ali Ahmadinia, Shaahin Hessabi, "An Efficient FFT Co-Module Using SOC Approach," International Workshop on IP-Based SoC Design, Grenoble, France, October 2002.

  87. 85. M. Hashempour, S. Sharifi, M. Gudarzi, and S. Hessabi, "Rapid Design Space Exploration of DSP Applications Using Programmable SoC Devices- A Case Study," Proceedings of the 15th Annual IEEE International ASIC/SOC Conference, pp. 273-277, Rochester, NY, USA, Sept. 2002.

  88. 86.  S. Hessabi, A. Ahmadinia, G. Asadi, S. Bayat Sarmadi, M. Gudarzi, "Co-FFT Design: FFT Implementation on CSoC," IEEE-TTTC International Conference on Automation, Quality and Testing, Robotics (A&QT-R 2002), pp. 325-330, Cluj-Napoca, Romania, May 2002. 

  89. 87.  L. Mahmoudi Ayough, A. Haj Abutalebi, O. F. Nadjarbashi, S. Hessabi, "Verilog2SC: A Methodology for Converting Verilog® HDL to SystemC," Proc. of the 11th  International HDL Conference (HDL Con 2002), pp. 211-217, San Jose, California, USA, March 2002.

  90. 88. O. Nadjarbashi, M. Gudarzi, and S. Hessabi, “DCT-2D Co-Module: An Implementation of Discrete Cosine Transform using SoC Approach,” Proc. Of the 7th CSI Computer Conference (CSICC 2002), pp. 9-14, Tehran, Iran, Feb. 2002.

  91. 89. S. Hessabi and M. B. Tahoori, “A Novel Model for Control-Flow Errors in High-Level Test Generation,” Proc. Of the 7th CSI Computer Conference (CSICC 2002) , pp. 22-26, Tehran, Iran, Feb. 2002.

  92. 90. M. H. Khansari, A. Movaghar, S. Hessabi, "Design and Implementation of a Tandem Switch Based on FPGA," Proceedings of the International Symposium on Telecommunications (IST2001), pp. 181-184, Tehran, Iran, September 2001. 

  93. 91. S. Hessabi and M. Hashempour, “A Hardware Accelerator for Test Generation,” (in Persian) Proc. Of the 6th CSI Computer Conference, pp. 126-131, Tehran, Iran, 2001.  

  94. 92. S. Hessabi and P. Ahmadi Attar, “Design and Implementation of a Reconfigurable Architecture for DSP Applications on FPGAs," (in Persian) Proc. Of the 5th CSI Computer Conference, Tehran, Iran, March 2000. 

  95. 93. M. Gudarzi and S. Hessabi, “Built-In Self-Test of FPGA Logic Blocks with no Area Overhead and performance degradation," (in Persian) Proc. Of the 4th CSI Computer Conference, pp. 50-55, Tehran, Iran, Jan. 1999.

  96. 94. S. Hessabi, K. Raahemifar, and M. I. Elmasry, “A Design-for-Testability Technique for CMOS/BiCMOS Logic Circuits," Seventh International Conference on Microelectronics (ICM), Malaysia, Dec. 1995.

  97. 95. K. Raahemifar, S. Hessabi, and M. I. Elmasry, “A Design-for-Testability Technique for Shorts and Bridging Faults in BiCMOS Logic Families," Proceedings of the 1995 Canadian Conference on Electrical and Computer Engineering, Vol. 1, pp. 221-224, Montreal, Canada, Sep. 1995.