Research Topics

Research Interests

• Green Computing
• Hardware-Software Co-design
• Reconfigurable Computing
• Mobile Computing
• Cloud Computing

Laboratories

• EASY (Energy Aware SYstems) Laboratory
Here we conduct research on techniques and tools to reduce power and energy consumption in two broad ways:
• Green of IT: energy optimization in digital systems, spanning small-scale MPSoCs to large-scale data centers and cloud computing platforms.
We mainly employ system-level techniques and tools such as task scheduling, power-mode selection, code and data placement, and similar static and dynamic choices applied by the compiler, Operating System, application software, and/or combinations of them.
• Green by IT: designing digital systems to improve energy efficiency in cyber physical systems such as buildings, factories, and cars.
An example of this category of work is a distributed control system to optimally distribute energy obtained from solar panels to the consumers in a building.
More details here...


• Smart Appliances Laboratory
Here we develop new or improved systems using various smart appliances including, but not limited to, smart phones, smart TVs, and mobile telecommunication infrastructure targeting quality of life, environment protection, and new business opportunities. We are interested in any clever application of such smart gadgets, especially involving Android OS.
Examples of our developments include:
• A Personal Tracking System
• A processor for the Dalvik virtual machine.
• A high-level model to estimate power consumption of Android applications.
• A development environment for SMS-based VAS (Value-Added Services) applications.
• An Android application to ease utility bill payment.
More details here...

Current/Past Research

Work at EASY Laboratory

• Energy-Aware Resource Allocation in Cloud Computing
Cloud computing is an emerging technology which promises reduced upfornt costs as well as elsticity for highly varying workloads encountered many times in today IT services over the internet. At the back end of this technology, an important enabling and underlying technology is Hypervisor that enables a single physical machine to simultaneously run several virtual machines (VM) each providing its own service to the users without being bound to the physical machine. This allows the VM to be freely, and even lively, moved across physical machines without the user even noticing it. This capability has enabled new opportunities to improve energy efficiency by smart distribution and management of physical resources among VMs in the cloud.
In this work, we are investigating network-aware, storage-aware, memory-aware, placement-aware, and cooling-aware allocation, binding, and scheduling of physical resources among the VMs in the cloud to reduce total energy consumption.


• Variation-Aware Data Center Energy Optimization
Effects of process variation on processors manufactured in today nanometer-scale technologies is visible as large variations in their leakage, and hence total, power. Reports by Intel researchers even at 180nm technology shows 20X leakage difference between identical-in-design chips. In high end processors typically employed in blade servers in large computing-intensive data centers, leakage comprises 20-40% of total power and since leakage is largely influenced by process variation effects, power variations are expected to be higher in such blade servers. Moreover, heat is recirculated by the air cooling mechanism in many large data centers, and hence, the heat influence of servers on one another differs from place to place in server racks and in the data center. Consequently, smart placement of servers in the data center together with server consolidation can reduce total energy consumption of the data center by reducing both the IT equipment energy as well as energy consumed for cooling.
In this work, we developed Integer Linear Programming (ILP) formulations as well as heuristic techniques for server placement in the data center and showed that together with our variation-aware server consolidation techniques, total energy consumption of the data center can be effectively reduced.
A number of our publications on this topic appear in CSI Int'l Symp. on Computer Architecture and Digital Systems (CADS), May 2012, and Int'l Symp. on Parallel and Distributed Processing with Applications (ISPA), July 2012. Two journal articles are also submitted and under review at the moment.


• Variation-Aware MPSoC Optimizations
Process variation has already become a major concern in nanometer-scale technologies, and is expected to only rise with technology scaling where we get ever closer to the atomic scales. This variation happens at the smallest scales in the devices patterned on the chip, but its effects are now visible even at processor level where the leakage power and frequency of operation of the same processor cores in a Multiprocessor System-on-Chip (MPSoC) varies from die to die, and also within the same die.
In this work, we developed statistical optimization techniques to improve yield of MPSoC chips under process variation effects. We used task scheduling, processor/cache configuration selection, and MPSoC architectural choices to improve power, power yield (percent of MPSoC chips consuming less power than the given limit), and performance yield (percent of MPSoC chips finishing the job earlier than the given limit.)
A number of our publications on this topic appear in Elsevier Journal of Microprocessors and Microsystems (in press, Feb. 2012), IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences (Special Section on "VLSI Design and CAD Algorithms"), Dec. 2010, Euromicro Conference on Digital System Design (Euro-DSD), Sep. 2012, Workshop on Variability Modeling and Characterization (VMC), in conjuction with ICCAD conf., Nov. 2011, Great Lakes Symposium on VLSI (GLSVLSI), May 2011, Workshop on Micro Power Management for Macro Systems on Chip (uPM2SoC) in conjuction with DATE conference, Mar. 2011, CSI Int'l Symposium on Computer Architecture and Digital Systems (CADS), Sep. 2010, Int'l Symposium on Quality Electronic Design (ISQED), Mar. 2010.


• Acceleration by FPGA, Co-Design, and GPU
There are numerous applictions and tasks, spanning image processing, video processing, network processing, network security, scientific computing, and many more, that need acceleration to achieve higher throughput and/or reduced response time. Moreover, there are many modern platforms that enable new methods for acceleration. Very high capacity FPGAs are available at commodity costs and can contain very large custom computing engines. Field-Programmable System-on-Chip (FPSoC) devices allow closely-coupled hardware-software implementation without needing the expensive manufacturing that was traditionally unavoidable. Dynamic (run-time) reconfiguration capability of modern FPGA and FPSoC devices has also enabled one more category of acceleration techniques. Availability of FPGA boards with PCI-Express connectivity has allowed them to communicate with high end processors on desktop/server motherboards at high speeds such that new and much larger scales of hardware-software co-design are now possible. GPU cards with hundreds to thousands of small but fast cores, available at commodity prices are enablers of yet another category of methods to accelerate computation-intensive tasks and applications.
In this category of research, we work on all such methods to achieve highest speeds at lowest costs in various applications.


• Hybrid Buildings
Buildings are responsible for around 40% of total energy consumed in our country. Taking advantage of renewable energy sources to protect the environment and reduce global warming has gained high global interest. Inspired by hybrid cars, we call such buildings that are run by hybrid sources of energy, i.e. renewable sources as well as fossil fuels, "hybrid buildings."
Solar energy is extensively available in Iran and can be fairly easily converted to electricity by solar panels, but these panels are expensive and taking best advantage of them such that the financial gain is maximized is a major concern. One way to improve financial advantage of solar electricity in buildings is to store the solar electricity during off-peak hours and cleverly pass it to appliances at peak hours which are usually at evenings. But given the limited capacity of batteries normally used, if the stored energy is not fully used during peak hours, it is actually wasted since the day after new solar energy is produced as well.
In this work, we developed a distributed control system that cleverly switched each appliance between the electricity obtained from the grid and from the solar panels such that total financial gain of using solar energy is maximized. The system uses AI techniques to predict future peak-time consumers so as to decide whether pass the stored energy to current consumers or keep it for a future better use.

Work at Smart Appliances Laboratory

• Personal Tracking System
Personal tracking has several health, business, and management uses to improve quality of life for individuals as well as quality of service for businesses. Our tracking systems is composed of an application installed on smart phones that locates the phone and keeps record of locations on a central server for online as well as offline monitoring and/or analysis. Our tracking system is provided as a cloud service and a sample of it can be viewed here...


• Dalvik Processor
Dalvik is the virtual machine underlying Android applications. In this work we are developing a processor architecture whose instruction-set is the Dalvik bytecodes. Each Android application is compiled into Dalvik bytecodes and the processor on the android device, i.e. your cell phone or tablet, interprets each Dalvik bytecode to the native instructions of the processor before executing them. This provides portability of the application across all Android devices, but is a time-consuming tasks that is one of the reasons behind sluggish performance of some Android applications.
By implementing such a Dalvik processor that natively implements Dalvik bytecodes, Android applications can be run significantly faster. This can enable more appealing applications such as games and movies. Our experimental results show that applications can be run up to 5 times faster on this processor compared to an ARMv7 processor (Qualcomm Scorpion) on a Google Nexus One cell phone. A paper we published on this topic appeared in the proceedings of ICCE conference in Germany in Sep. 2012.


• Power macro-model
This work developed a Macro-model to quickly and accurately estimate energy consumption of Android applications while developing them on Google Nexus One phone. The macro-model takes only high-level parameters such as status of WiFi, GPS, LCD brightness, and the like during the application execution, and gives an estimation of the energy consumption of the cell phone while executing that application. The model was tuned using actual measurements by internal battery sensors of Google Nexus One cell phone.
This is a handy tool for Android application developers to track and tune battery use of their applications.


• VAS Application Development Environment
We designed a development environment for SMS-based VAS (Value-Added Services) applications in this work. A major barrier to develop SMS-based VAS applications is access to operator SMS infrastructure to test the application, both for functionality as well as for performance, before launch. Special short numbers are usually sold by telecom operators or third-party vendors, but they can be expensive and slow. Our development environment allows easy development of such VAS applications by applying test cases for functional test, and also supports sending massive SMS loads to the VAS applications to test its robustness and responsiveness under heavy loads.


• Bill-Payment Android Application
  This work developed an Android application to make it easier to pay utility bills, such as telephone, electricity, and water bills, using the barcodes provided on those bills instead of manually entering the codes displayed on the bills. The user scans the barcode using phone camera, the application processes and extracts the payment codes, and then after approval of the user, the bill is paid using USSD communication capabilities sent to the bank.